MARC details
000 -LEADER |
fixed length control field |
01358cam a2200337 a 4500 |
CONTROL NUMBER |
control field |
16069572 |
DATE AND TIME OF LATEST TRANSACTION |
control field |
20170819104555.0 |
FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
fixed length control field |
100126s2011 njua b 001 0 eng |
LIBRARY OF CONGRESS CONTROL NUMBER |
LC control number |
2010000761 |
NATIONAL BIBLIOGRAPHY NUMBER |
National bibliography number |
GBB000516 |
Source |
bnb |
NATIONAL BIBLIOGRAPHIC AGENCY CONTROL NUMBER |
Record control number |
015453131 |
Source |
Uk |
INTERNATIONAL STANDARD BOOK NUMBER |
International Standard Book Number |
9780470531082 (cloth) |
INTERNATIONAL STANDARD BOOK NUMBER |
International Standard Book Number |
0470531088 (cloth) |
SYSTEM CONTROL NUMBER |
System control number |
(OCoLC)ocn401167870 |
CATALOGING SOURCE |
Original cataloging agency |
DLC |
Transcribing agency |
DLC |
Modifying agency |
BTCTA |
-- |
YDXCP |
-- |
C#P |
-- |
BWX |
-- |
CDX |
-- |
UKM |
-- |
DLC |
LIBRARY OF CONGRESS CALL NUMBER |
Classification number |
TK7888.3 |
Item number |
.V274 2011 |
DEWEY DECIMAL CLASSIFICATION NUMBER |
Classification number |
621.39 |
Edition number |
22 |
Item number |
VAH |
MAIN ENTRY--PERSONAL NAME |
Personal name |
Vahid, Frank. |
9 (RLIN) |
2742 |
TITLE STATEMENT |
Title |
Digital design, with RTL design, VHDL, and Verilog / |
Statement of responsibility, etc |
Frank Vahid. |
EDITION STATEMENT |
Edition statement |
2nd ed. |
PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) |
Place of publication, distribution, etc |
Hoboken, NJ : |
Name of publisher, distributor, etc |
Wiley, |
Date of publication, distribution, etc |
c2011. |
PHYSICAL DESCRIPTION |
Extent |
xvi, 575 p. : |
Other physical details |
ill. ; |
Dimensions |
25 cm. |
BIBLIOGRAPHY, ETC. NOTE |
Bibliography, etc |
Includes bibliographical references and index. |
FORMATTED CONTENTS NOTE |
Formatted contents note |
Introduction -- Combinational logic design -- Sequential logic design : controllers -- Datapath components -- Register-transfer level (RTL) design -- Optimizations and tradeoffs -- Physical implementation on ICs -- Programmable processors -- Hardware description languages -- Appendix A Boollean Algebras -- Appendix B Additional topics in binary number systems -- Appendix C Extended RTL design example |
SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
Electronic digital computers |
General subdivision |
Design and construction. |
SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
Computer architecture. |
SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
RTL (Computer program language) |
SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
VHDL (Computer hardware description language) |
9 (RLIN) |
8589 |
SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
Verilog (Computer hardware description language) |
9 (RLIN) |
6777 |
ADDED ENTRY ELEMENTS (KOHA) |
Source of classification or shelving scheme |
Dewey Decimal Classification |
Item type |
Reference |